Trace Cache Publications
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Sanjay J. Patel, Daniel H. Friendly, and Yale N. Patt,
"Evaluation of Design Options for the Trace Cache Fetch Mechanism,"
IEEE Transactions on Computers, Special Issue on Cache Memory and Related Problems, February 1999, Vol 48, Num 2, pp. 193-204.
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Daniel H. Friendly, Sanjay J. Patel, and Yale N. Patt,
"Putting the Fill Unit to Work: Dynamic Optimizations for Trace Cache Microprocessors,"
Proceedings of the 31st ACM/IEEE International Symposium on Microarchitecture,
Dallas, TX, December 1998.
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Sanjay J. Patel, Marius Evers, and Yale N. Patt,
"Improving Trace Cache Effectiveness with Branch Promotion and Trace Packing,"
Proceedings of the 25th International Symposium on Computer Architecture,
Barcelona, Spain, June 1998.
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Daniel H. Friendly, Sanjay J. Patel, and Yale N. Patt,
"Alternative Fetch and Issue Policies for the Trace Cache Fetch Mechanism,"
Proceedings of the 30th ACM/IEEE International Symposium on Microarchitecture,
Research Triangle Park, North Carolina, November 1997.
- Sanjay J. Patel, Daniel H. Friendly, and Yale N. Patt,
"Critical Issues Regarding the Trace Cache Fetch Mechanism,"
University of Michigan, Technical Report, CSE-TR-335-97, May 1997.