A student writes: Dr. Patt Do you latch BEN? It seems to me as if that is extremely simple combinational logic and does not need to be latched. If it is latched in one cycle, the next cycle can start with that value. If it is not latched, the next cycle has to generate it, which means increasing the length of the cycle. Therefore, we latch it. You could decide not to latch it, but I would argue lengthing the clock is not a good design decision. I guess it would matter for a pipelined architecture. Not clear pipelining makes any difference. The second thing I wanted to say was if in the microsequencer we replace IR[15:12] with MDR[15:12] can we eliminate state 32 You could, but I intentionally decided not to since IR is likely close to the microsequencer and MDR is likely not. In our data path MDR is on one side of the bus and IR on the side of the bus close to the microsequencer. So, even though, this is more a matter of style than anything else, it "felt" more "right" to not decode right out of the MDR. Depending on where MDR actually is, of you could. and bit 15:12 on the IR? I guess it might be considered too heretical to remove the opcode from the instruction register. My experience is that one person's heresy is another's divine word, and I had best ignore both. I hope that is not an issue. And, if it became an issue, we would undoubtedly give IR a new name. Yale Patt Thanks <>